Invention Grant
- Patent Title: Integrated circuit packaging system with embedded interconnect and method of manufacture thereof
- Patent Title (中): 具有嵌入式互连的集成电路封装系统及其制造方法
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Application No.: US12639997Application Date: 2009-12-17
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Publication No.: US08476775B2Publication Date: 2013-07-02
- Inventor: JoungIn Yang , YoungSik Cho , SungHyun Lee
- Applicant: JoungIn Yang , YoungSik Cho , SungHyun Lee
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Ltd.
- Current Assignee: STATS ChipPAC Ltd.
- Current Assignee Address: SG Singapore
- Agency: Ishimaru & Associates LLP
- Main IPC: H01L23/28
- IPC: H01L23/28 ; H01L21/00

Abstract:
A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit with an adhesive attached thereto; connecting the integrated circuit and a plated interconnect pad; attaching an embedded interconnect to the plated interconnect pad; and forming an encapsulation, having an encapsulation first side and an encapsulation second side, around the integrated circuit, the embedded interconnect, and the plated interconnect pad with the embedded interconnect exposed from the encapsulation second side and the plated interconnect pad and the adhesive exposed from the encapsulation second side.
Public/Granted literature
- US20110147906A1 INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EMBEDDED INTERCONNECT AND METHOD OF MANUFACTURE THEREOF Public/Granted day:2011-06-23
Information query
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