Invention Grant
- Patent Title: Reduced area schmitt trigger circuit
- Patent Title (中): 减少面积施密特触发电路
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Application No.: US12614047Application Date: 2009-11-06
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Publication No.: US08476948B2Publication Date: 2013-07-02
- Inventor: Rajeev Jain
- Applicant: Rajeev Jain
- Applicant Address: NL Amsterdam
- Assignee: STMicroelectronics International N.V.
- Current Assignee: STMicroelectronics International N.V.
- Current Assignee Address: NL Amsterdam
- Agency: Hogan Lovells US LLP
- Priority: IN1739/Del/2009 20090821
- Main IPC: H03K3/00
- IPC: H03K3/00
Abstract:
A Schmitt trigger circuit includes a first inverter having an input coupled to an input terminal; a second inverter having an input coupled to the input terminal; a first transistor having a source coupled to VDD, a drain coupled to an output of the first inverter, and a gate coupled to an output terminal; a second transistor having a source coupled to ground, a drain coupled to an output of the second inverter, and a gate coupled to the output terminal; a third transistor having a source coupled to VDD, a drain coupled to the output terminal, and a gate coupled to the output of the first inverter; and a fourth transistor having a source coupled to ground, a drain coupled to the output terminal, and a gate coupled to the output of the second inverter.
Public/Granted literature
- US20110043265A1 REDUCED AREA SCHMITT TRIGGER CIRCUIT Public/Granted day:2011-02-24
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