Invention Grant
- Patent Title: Nonvolatile memory devices and related methods and systems
- Patent Title (中): 非易失存储器件及相关方法和系统
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Application No.: US12974809Application Date: 2010-12-21
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Publication No.: US08477524B2Publication Date: 2013-07-02
- Inventor: Shoichi Kawamura
- Applicant: Shoichi Kawamura
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec
- Priority: JP2009-294114 20091225; KR10-2010-0024119 20100318
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G11C11/16 ; G11C8/08

Abstract:
Nonvolatile memory devices are provided including a memory cell array having a plurality of stacked memory layers and a rectifier configured to select memory cells constituting each memory layer sharing a word line or a bit line with another adjacent memory layer. The nonvolatile memory devices including a word line driving unit configured to drive a first word line, connected to a first memory cell of a first memory layer to be read, at a first voltage level and drive a second word line, connected to a second memory cell of a second memory layer sharing a first bit line connected to the first memory cell, at a second voltage level. The nonvolatile memory device further includes a bit line biasing unit configured to bias the first bit line at the second voltage level and bias a second bit line, connected to a third memory cell of a third memory layer sharing the first word line, at the first voltage level. Related methods and systems are also provided herein.
Public/Granted literature
- US20110157960A1 Nonvolatile Memory Devices and Related Methods and Systems Public/Granted day:2011-06-30
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