Invention Grant
- Patent Title: Power management of components having clock processing circuits
- Patent Title (中): 具有时钟处理电路的组件的电源管理
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Application No.: US13294327Application Date: 2011-11-11
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Publication No.: US08479030B2Publication Date: 2013-07-02
- Inventor: Daniel J. Allen
- Applicant: Daniel J. Allen
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Edell, Shapiro & Finnan LLC
- Main IPC: G06F1/00
- IPC: G06F1/00

Abstract:
A method and system for managing power consumption of a component that employs a clock processing circuit to produce a processed clock signal used by the component from a clock signal supplied to the clock processing circuit. A frequency of a clock signal supplied to the clock processing circuit is changed based on operating characteristics of a voltage regulator module (VRM) or power supply unit so as to maintain acceptable operating parameters of the power supply unit during a change in frequency of a clock signal.
Public/Granted literature
- US20120072756A1 Power Management of Components Having Clock Processing Circuits Public/Granted day:2012-03-22
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