Invention Grant
- Patent Title: Memory errors
- Patent Title (中): 内存错误
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Application No.: US13187061Application Date: 2011-07-20
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Publication No.: US08479039B2Publication Date: 2013-07-02
- Inventor: David Alan Edwards , Joe Woodward
- Applicant: David Alan Edwards , Joe Woodward
- Applicant Address: US DE Wilmington
- Assignee: Icera Inc.
- Current Assignee: Icera Inc.
- Current Assignee Address: US DE Wilmington
- Priority: GB0723316.6 20071128
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
The present invention provides a method of protecting against errors in a boot memory, the method comprising initiating booting of a processor by executing primary boot code from a primary boot memory, and based on the execution of the primary boot code: accessing a data structure comprising a plurality of redundant portions of boot information stored on a secondary boot memory; performing an error check on a plurality of the portions to determine whether those portions contain errors and, based on the error checks, to identify a valid portion; and booting the processor using the valid portion of boot information.
Public/Granted literature
- US20110283136A1 MEMORY ERRORS Public/Granted day:2011-11-17
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