Invention Grant
- Patent Title: Power MOS electronic device and corresponding realizing method
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Application No.: US12967861Application Date: 2010-12-14
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Publication No.: US08482085B2Publication Date: 2013-07-09
- Inventor: Angelo Magri , Ferruccio Frisina , Giuseppe Ferla
- Applicant: Angelo Magri , Ferruccio Frisina , Giuseppe Ferla
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Graybeal Jackson LLP
- Priority: ITMI2004A2243 20041119; ITMI2004A2244 20041119; ITMI2004A2245 20041119
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
Power MOS device of the type comprising a plurality of elementary power MOS transistors having respective gate structures and comprising a gate oxide with double thickness having a thick central part and lateral portions of reduced thickness. Such device exhibiting gate structures comprising first gate conductive portions overlapped onto said lateral portions of reduced thickness to define, for the elementary MOS transistors, the gate electrodes, as well as a conductive structure or mesh. Such conductive structure comprising a plurality of second conductive portions overlapped onto the thick central part of gate oxide and interconnected to each other and to the first gate conductive portions by means of a plurality of conducive bridges.
Public/Granted literature
- US20110089491A1 POWER MOS ELECTRONIC DEVICE AND CORRESPONDING REALIZING METHOD Public/Granted day:2011-04-21
Information query
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