Invention Grant
- Patent Title: Semiconductor substrate, laminated chip package, semiconductor plate and method of manufacturing the same
- Patent Title (中): 半导体衬底，层叠芯片封装，半导体板及其制造方法
-
Application No.: US12656458Application Date: 2010-01-29
-
Publication No.: US08482105B2Publication Date: 2013-07-09
- Inventor: Yoshitaka Sasaki , Hiroyuki Ito , Atsushi Iijima
- Applicant: Yoshitaka Sasaki , Hiroyuki Ito , Atsushi Iijima
- Applicant Address: US CA Milpitas CN Hong Kong
- Assignee: Headway Technologies, Inc.,Sae Magnetics (H.K.) Ltd.
- Current Assignee: Headway Technologies, Inc.,Sae Magnetics (H.K.) Ltd.
- Current Assignee Address: US CA Milpitas CN Hong Kong
- Agency: Oliff & Berridge, PLC
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/76
Abstract:
A semiconductor substrate has a plurality of groove portions formed along scribe lines. The semiconductor substrate includes: a unit region in contact with at least any one of the plurality of groove portions; and a wiring electrode with a portion thereof arranged within the unit region. Further, the plurality of groove portions have a wide-port structure in which a wide width portion wider in width than a groove lower portion including a bottom portion is formed at an inlet port thereof.
Public/Granted literature
Information query
IPC分类:
