Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US12081739Application Date: 2008-04-21
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Publication No.: US08482113B2Publication Date: 2013-07-09
- Inventor: Hidenori Hasegawa
- Applicant: Hidenori Hasegawa
- Applicant Address: JP Yokohama
- Assignee: Lapis Semiconductor Co., Ltd.
- Current Assignee: Lapis Semiconductor Co., Ltd.
- Current Assignee Address: JP Yokohama
- Agency: Rabin & Berdo, P.C.
- Priority: JP2007-119772 20070427
- Main IPC: H01L23/22
- IPC: H01L23/22 ; H01L23/24

Abstract:
A package substrate has wires that electrically connect to a semiconductor chip, and surface side terminals that are solid and cylindrical and ends of which are electrically connected to the wires. The semiconductor chip is sealed by a sealing resin layer that is formed by molding a sealing resin so as to cover the semiconductor chip. A surface of the sealing resin layer is made to have a height that is the same as that of end surfaces of other ends of the surface side terminals by grinding. Thus, the surface of the sealing resin layer is a ground surface that is a rough surface and is formed by grinding. The end surfaces of the surface side terminals are exposed at the ground surface of the sealing resin layer.
Public/Granted literature
- US20080265412A1 Semiconductor device and method of manufacturing thereof Public/Granted day:2008-10-30
Information query
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