Invention Grant
US08482137B2 Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same 有权
安装半导体芯片的方法,使用该方法获得的半导体器件,连接半导体芯片的方法,其表面上配线的三维结构及其制造方法

  • Patent Title: Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
  • Patent Title (中): 安装半导体芯片的方法,使用该方法获得的半导体器件,连接半导体芯片的方法,其表面上配线的三维结构及其制造方法
  • Application No.: US13144112
    Application Date: 2010-01-26
  • Publication No.: US08482137B2
    Publication Date: 2013-07-09
  • Inventor: Shingo YoshiokaHiroaki Fujiwara
  • Applicant: Shingo YoshiokaHiroaki Fujiwara
  • Applicant Address: JP Osaka
  • Assignee: Panasonic Corporation
  • Current Assignee: Panasonic Corporation
  • Current Assignee Address: JP Osaka
  • Agency: Greenblum & Berstein, P.L.C.
  • Priority: JP2009-015052 20090127; JP2009-253131 20091104
  • International Application: PCT/JP2010/050971 WO 20100126
  • International Announcement: WO2010/087336 WO 20100805
  • Main IPC: H01L23/48
  • IPC: H01L23/48
Method of mounting semiconductor chips, semiconductor device obtained using the method, method of connecting semiconductor chips, three-dimensional structure in which wiring is provided on its surface, and method of producing the same
Abstract:
One aspect of the present invention is a method of mounting a semiconductor chip having: a step of forming a resin coating on a surface of a path connecting a bonding pad on a surface of a semiconductor chip and an electrode pad formed on a surface of an insulating base material; a step of forming, by laser beam machining, a wiring gutter having a depth that is equal to or greater than a thickness of the resin coating along the path for connecting the bonding pad and the electrode pad; a step of depositing a plating catalyst on a surface of the wiring gutter; a step of removing the resin coating; and a step of forming an electroless plating coating only at a site where the plating catalyst remains. Another aspect of the present invention is a three-dimensional structure in which a wiring is formed on a surface, wherein, on the surface of the three-dimensional structure, a recessed gutter for wiring is formed, extending between mutually intersecting adjacent faces of the three-dimensional structure, and wherein at least a part of a wiring conductor is embedded in the recessed gutter for wiring.
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