Invention Grant
- Patent Title: Loop gain adjusting circuit
- Patent Title (中): 环路增益调整电路
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Application No.: US13152846Application Date: 2011-06-03
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Publication No.: US08482239B2Publication Date: 2013-07-09
- Inventor: Hideki Hirayama
- Applicant: Hideki Hirayama
- Applicant Address: BM Hamilton
- Assignee: ON Semiconductor Trading, Ltd.
- Current Assignee: ON Semiconductor Trading, Ltd.
- Current Assignee Address: BM Hamilton
- Agency: Osha Liang LLP
- Priority: JP2010-127629 20100603
- Main IPC: G05B19/408
- IPC: G05B19/408

Abstract:
In an adder circuit, a sine wave is added to a compensation signal which is generated based on a position detection signal of a member to be driven and for compensating a position of a lens which is the member to be driven. An absolute value integrating circuit integrates absolute values of signals before and after the adder circuit adds the sine wave. The two obtained integrated values are compared by a comparator circuit, and a gain adjusting circuit adjusts a gain of an amplifier which amplifies the compensation signal so that the two integrated values are equal to each other.
Public/Granted literature
- US20110298410A1 LOOP GAIN ADJUSTING CIRCUIT Public/Granted day:2011-12-08
Information query
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