Invention Grant
US08482325B2 Reducing an EMI effect by preventing the diffuse width with the SSCG from being limited by the jitter standard value in a structure in which a PLL circuit is mounted
有权
在安装PLL电路的结构中,通过防止SSCG的漫射宽度受到抖动标准值的限制而降低EMI效应
- Patent Title: Reducing an EMI effect by preventing the diffuse width with the SSCG from being limited by the jitter standard value in a structure in which a PLL circuit is mounted
- Patent Title (中): 在安装PLL电路的结构中,通过防止SSCG的漫射宽度受到抖动标准值的限制而降低EMI效应
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Application No.: US13727867Application Date: 2012-12-27
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Publication No.: US08482325B2Publication Date: 2013-07-09
- Inventor: Toru Ohmine
- Applicant: Toru Ohmine
- Applicant Address: JP Tokyo
- Assignee: Ricoh Company, Ltd.
- Current Assignee: Ricoh Company, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: IPUSA, PLLC
- Priority: JP2010-063310 20100318
- Main IPC: H03L7/06
- IPC: H03L7/06 ; G06F15/00

Abstract:
A disclosed image forming apparatus includes a recording unit which records image data on a recording medium; a first spread spectrum clock generator receiving a first clock signal, providing the first clock signal with frequency diffusion to have a first predetermined frequency diffusion width, and outputting a second clock signal; a PLL circuit outputting a third clock signal synchronously oscillating at a frequency obtained by multiplying the frequency of the first clock signal; an image processing unit receiving the third clock signal, and outputting the processed image data in synchronism with the third clock signal; a speed conversion unit receiving the second and third clock signals, and receiving and outputting the image data in synchronism with the second clock signal; and an input and output control unit outputting the image data to the recording unit in synchronism with the second clock signal.
Public/Granted literature
- US20130114109A1 IMAGE FORMING APPARATUS, ELECTRIC APPARATUS, AND RECORDING CONTROL METHOD Public/Granted day:2013-05-09
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