Invention Grant
- Patent Title: Multi-bit resistance-switching memory cell
- Patent Title (中): 多位电阻切换存储单元
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Application No.: US13396501Application Date: 2012-02-14
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Publication No.: US08482960B2Publication Date: 2013-07-09
- Inventor: Roy E. Scheuerlein
- Applicant: Roy E. Scheuerlein
- Applicant Address: US CA Milpitas
- Assignee: Sandisk 3D LLC
- Current Assignee: Sandisk 3D LLC
- Current Assignee Address: US CA Milpitas
- Agency: Vierra Magen Marcus LLP
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A non-volatile storage apparatus comprises a set of Y lines, a set of X lines and a plurality of memory cells in communication with the set of X lines and the set of Y lines. Each memory cell of the plurality of memory cells includes a resistance element in a static resistance condition and two or more reversible resistance-switching elements. The resistance element in the static resistance condition and the two or more reversible resistance-switching elements are connected to different Y lines of the set of Y lines. The resistance element in the low resistance state and the two or more reversible resistance-switching elements are connected to a common X line of the set of X lines. One or multiple bits of data are programmed into a particular memory cell of the plurality of memory cells by causing current flow between Y lines connected to the particular memory cell.
Public/Granted literature
- US20120140547A1 Multi-Bit Resistance-Switching Memory Cell Public/Granted day:2012-06-07
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