Invention Grant
US08482981B2 Method of forming an integrated circuit with NAND flash array segments and intra array multiplexers and corresponding integrated circuit with NAND flash array segments and intra array multiplexers
有权
用NAND闪存阵列段和阵列内多路复用器形成集成电路的方法以及具有NAND闪存阵列段和阵列内多路复用器的相应集成电路
- Patent Title: Method of forming an integrated circuit with NAND flash array segments and intra array multiplexers and corresponding integrated circuit with NAND flash array segments and intra array multiplexers
- Patent Title (中): 用NAND闪存阵列段和阵列内多路复用器形成集成电路的方法以及具有NAND闪存阵列段和阵列内多路复用器的相应集成电路
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Application No.: US12129765Application Date: 2008-05-30
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Publication No.: US08482981B2Publication Date: 2013-07-09
- Inventor: Steffen Meyer
- Applicant: Steffen Meyer
- Applicant Address: DE München
- Assignee: Qimonda AG
- Current Assignee: Qimonda AG
- Current Assignee Address: DE München
- Agency: Murphy, Bilak & Homiller, PLLC
- Main IPC: G11C11/34
- IPC: G11C11/34
Abstract:
The present invention provides an integrated circuit including N1 NAND flash array segments with N2 local bit lines, N1 intra array multiplexers and N2/2 global bit lines. Further, the present invention provides a method of producing an integrated circuit including N1 NAND flash array segments with N2 local bit lines, N1 intra array multiplexers and N2/2 global bit lines.
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