According to one embodiment, a nonvolatile semiconductor memory device includes a memory cell array, a bit line, and a voltage generator. The memory cell array includes each of a plurality of memory cells. Each of the memory cells includes a charge storage layer and a control gate and is capable of holding two or more levels of data. The bit line is capable of transferring data to the memory cells in a one-to-one correspondence. The voltage generator carries out a verify operation by applying a verify voltage to the memory cells after performing first writing by applying a first voltage and then a second voltage lower than the first voltage to the control gate.