Invention Grant
US08484445B2 Memory control circuit and integrated circuit including branch instruction and detection and operation mode control of a memory
有权
存储器控制电路和集成电路，包括分支指令和存储器的检测和操作模式控制
- Patent Title: Memory control circuit and integrated circuit including branch instruction and detection and operation mode control of a memory
- Patent Title (中): 存储器控制电路和集成电路，包括分支指令和存储器的检测和操作模式控制
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Application No.: US13419318Application Date: 2012-03-13
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Publication No.: US08484445B2Publication Date: 2013-07-09
- Inventor: Kiminari Yamazoe
- Applicant: Kiminari Yamazoe
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-174635 20080703
- Main IPC: G06F9/00
- IPC: G06F9/00 ; G06F1/32
Abstract:
A memory control circuit includes a branch detection section to detect a branch instruction from an instruction fetched from a memory unit including a plurality of operation modes, and a mode control section to change an operation mode of the memory unit according to a detection result by the branch detection section. The memory unit includes a plurality of memories, the plurality of operation modes include a normal mode allowing access and a standby mode consuming a lower power than the normal mode, and in response to the detection of a branch instruction from an instruction fetched from any one of the plurality of memories, the mode control section makes standby release of the other memories.
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