Invention Grant
- Patent Title: Fusebay controller structure, system, and method
- Patent Title (中): Fusebay控制器结构,系统和方法
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Application No.: US13204929Application Date: 2011-08-08
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Publication No.: US08484543B2Publication Date: 2013-07-09
- Inventor: Darren L. Anand , Kevin W. Gorman , Michael R. Ouellette , Michael A. Ziegerhofer
- Applicant: Darren L. Anand , Kevin W. Gorman , Michael R. Ouellette , Michael A. Ziegerhofer
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Hoffman Warnick LLC
- Agent David A. Cain
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
Error correction is selectively applied to data, such as repair data to be stored in a fusebay for BIST/BISR on an ASIC or other semiconductor device. Duplicate bit correction and error correction code state machines may be included, and selectors, such as multiplexers, may be used to enable one or both types of correction. Each state machine may include an indicator, such as a “sticky bit,” that may be activated when its type of correction is encountered. The indicator(s) may be used to develop quality and yield control criteria during manufacturing test of parts including embodiments of the invention.
Public/Granted literature
- US20130042166A1 FUSEBAY CONTROLLER STRUCTURE, SYSTEM, AND METHOD Public/Granted day:2013-02-14
Information query
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