Invention Grant
- Patent Title: Multi-layer chip carrier and process for making
- Patent Title (中): 多层芯片载体和制造工艺
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Application No.: US13427184Application Date: 2012-03-22
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Publication No.: US08484839B2Publication Date: 2013-07-16
- Inventor: Pui-Yan Lin , Govindasamy Paramasivam Rajendran , George Elias Zahr
- Applicant: Pui-Yan Lin , Govindasamy Paramasivam Rajendran , George Elias Zahr
- Applicant Address: US DE Wilmington
- Assignee: E I du Pont de Nemours and Company
- Current Assignee: E I du Pont de Nemours and Company
- Current Assignee Address: US DE Wilmington
- Main IPC: H05K3/02
- IPC: H05K3/02 ; H05K3/36 ; H01K3/10
Abstract:
Provided are processes for making multi-layer chip carriers comprising an asymmetric cross-linked polymeric dielectric film.
Public/Granted literature
- US20120178260A1 MULTI-LAYER CHIP CARRIER AND PROCESS FOR MAKING Public/Granted day:2012-07-12
Information query
