Invention Grant
US08487421B2 Microelectronic package with stacked microelectronic elements and method for manufacture thereof 有权
具有堆叠微电子元件的微电子封装及其制造方法

Microelectronic package with stacked microelectronic elements and method for manufacture thereof
Abstract:
A microelectronic package may include a stacked microelectronic unit including at least first and second vertically stacked microelectronic elements each having a front face facing a top surface of the package. The front face of the first element may be adjacent the top surface, and the first element may overlie the front face of the second element such that at least a portion of the front face of the second element having an element contact thereon extends beyond an edge of the first element. A conductive structure may electrically connect a first terminal at the top surface to an element contact at the front face of the second element, and include a continuous monolithic metal feature extending along the top surface and through at least a portion of an encapsulant, which is between the top surface and the front face of the second element, towards the element contact.
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