Invention Grant
- Patent Title: Interconnect structure of semiconductor integrated circuit and semiconductor device including the same
- Patent Title (中): 半导体集成电路的互连结构和包括其的半导体器件
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Application No.: US13169398Application Date: 2011-06-27
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Publication No.: US08487423B2Publication Date: 2013-07-16
- Inventor: Yoichi Matsumura , Chie Kabuo , Takako Ohashi , Tadafumi Kadota , Kazuhiko Fujimoto , Hirofumi Miyashita
- Applicant: Yoichi Matsumura , Chie Kabuo , Takako Ohashi , Tadafumi Kadota , Kazuhiko Fujimoto , Hirofumi Miyashita
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2009-028880 20090210
- Main IPC: H01L23/52
- IPC: H01L23/52

Abstract:
In a semiconductor integrated circuit chip including an interconnect layer in which there is a limitation on the lengths of interconnects or areas occupied by the interconnects, empty spaces between power supply interconnect segments having the same potential located in parallel to a priority interconnect direction, are shifted relative to each other within the limits of the lengths and areas of power supply interconnects. As a result, a local increase in resistance is dispersed, whereby an influence on a voltage drop is reduced.
Public/Granted literature
- US20110260333A1 INTERCONNECT STRUCTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME Public/Granted day:2011-10-27
Information query
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