The TFT substrate includes (i) gate lines and data lines which are provided in a matrix manner, (ii) a plurality of pixel electrodes each of which has a side which extends in parallel with the gate lines and a side which extends in parallel with the data lines and is shorter than the side, (iii) storage capacitor lines extending in parallel with the gate lines, and (iv) connection lines which are electrically connected to the respective pixel electrodes. In at least one embodiment, the number of the storage capacitor lines is smaller than that of the gate lines. A single one of the storage capacitor lines overlap a plurality of connection lines which are electrically connected to respective of the plurality of pixel electrodes which are arranged in a direction in parallel with the data lines. The single one of the storage capacitor lines and the plurality of connection lines overlap each other via the insulating film so as to form storage capacitor elements.