When forming via openings in sophisticated semiconductor devices, a silicon-containing anti-reflective coating (ARC) layer may be efficiently used for adjusting the critical dimension of the via openings by using a two-step etch process in which, in at least one of the process steps, the flow rate of a reactive gas component may be controlled to increase or reduce the resulting width of an opening in the silicon ARC layer. In this manner, the spread of critical dimensions of vias around the target value may be significantly reduced while also reducing any maintenance and rework efforts.