Invention Grant
- Patent Title: Vertically stackable dies having chip identifier structures
- Patent Title (中): 具有芯片标识符结构的垂直堆叠模具
-
Application No.: US12793081Application Date: 2010-06-03
-
Publication No.: US08492905B2Publication Date: 2013-07-23
- Inventor: Jungwon Suh
- Applicant: Jungwon Suh
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Sam Talpalatsky; Nicholas J. Pauley; Joseph Agusta
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40
Abstract:
A vertically stackable die having a chip identifier structure is disclosed. In a particular embodiment, a semiconductor device is disclosed that includes a die comprising a first through via to communicate a chip identifier and other data. The semiconductor device also includes a chip identifier structure that comprises at least two through vias that are each hard wired to an external electrical contact.
Public/Granted literature
- US20110079924A1 Vertically Stackable Dies Having Chip Identifier Structures Public/Granted day:2011-04-07
Information query
IPC分类:
