Invention Grant
US08493099B2 Sample and hold circuit and method for controlling same 有权
采样保持电路及其控制方法

  • Patent Title: Sample and hold circuit and method for controlling same
  • Patent Title (中): 采样保持电路及其控制方法
  • Application No.: US13060991
    Application Date: 2009-09-15
  • Publication No.: US08493099B2
    Publication Date: 2013-07-23
  • Inventor: Hidemi Noguchi
  • Applicant: Hidemi Noguchi
  • Applicant Address: JP Tokyo
  • Assignee: NEC Corporation
  • Current Assignee: NEC Corporation
  • Current Assignee Address: JP Tokyo
  • Priority: JP2008-238198 20080917
  • International Application: PCT/JP2009/066096 WO 20090915
  • International Announcement: WO2010/032727 WO 20100325
  • Main IPC: G11C27/02
  • IPC: G11C27/02 H03K5/00 H03K17/00
Sample and hold circuit and method for controlling same
Abstract:
A sample and hold circuit that is provided with an input stage amplifier circuit for amplifying an input signal and a hold circuit for holding an output signal of the input stage amplifier circuit, with a sampling clock signal as a trigger, is further provided with a hold circuit bias current switching circuit for switching a bias current of the hold circuit to a first separate circuit that is functionally independent of the sample and hold circuit, in a case where the hold circuit is in a hold period, to supply the bias current to the circuit.
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