Invention Grant
- Patent Title: Alignment circuit for parallel data streams
- Patent Title (中): 并行数据流对齐电路
-
Application No.: US13178536Application Date: 2011-07-08
-
Publication No.: US08495264B1Publication Date: 2013-07-23
- Inventor: Michael Hammer , Jin Zhang
- Applicant: Michael Hammer , Jin Zhang
- Applicant Address: US OR Hillsboro
- Assignee: Lattice Semiconductor Corporation
- Current Assignee: Lattice Semiconductor Corporation
- Current Assignee Address: US OR Hillsboro
- Agency: Mendelsohn, Drucker & Associates, P.C.
- Main IPC: G06F13/12
- IPC: G06F13/12 ; H04L7/00

Abstract:
Parallel data generated by demultiplexing received serial data such as in a Serial RapidIO (SRIO) data stream can become misaligned as a result of, e.g., clock tolerance compensation (CTC) processing at the receiver. In one embodiment of the invention, the misaligned parallel data is properly aligned based on a mapping from each of a finite number of possible previous alignment conditions (e.g., words A-D) to a corresponding finite number of possible subsequent alignment conditions (e.g., words B-G). The change from a previous alignment condition to a different subsequent alignment condition is recognized by determining the location of start-of-packet (SOP) or start-of-control-symbol (SOC) data in the parallel data stream.
Information query