A timing control circuit used to provide a timing control signal to a FSB power supply of a computer includes a first resistor, a second resistor, and a switch. The first resistor and the second resistor are connected in series between a power supply and ground. One end of the switch is connected to the computer and receives a state signal from the computer. Another end of the switch is connected a node between the first and second resistors and outputs a timing control signal according to the state signal.