Invention Grant
- Patent Title: Method for manufacturing a high-performance semiconductor structure with a replacement gate process and a stress memorization technique
- Patent Title (中): 用替代栅极工艺和应力记忆技术制造高性能半导体结构的方法
-
Application No.: US13061296Application Date: 2010-09-26
-
Publication No.: US08497197B2Publication Date: 2013-07-30
- Inventor: Huilong Zhu , Haizhou Yin , Zhijiong Luo
- Applicant: Huilong Zhu , Haizhou Yin , Zhijiong Luo
- Applicant Address: CN Beijing
- Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee: Institute of Microelectronics, Chinese Academy of Sciences
- Current Assignee Address: CN Beijing
- Agency: Osha Liang LLP
- Priority: CN201010269267 20100831
- International Application: PCT/CN2010/001485 WO 20100926
- International Announcement: WO2012/027865 WO 20120308
- Main IPC: H01L21/3205
- IPC: H01L21/3205

Abstract:
A method for manufacturing a semiconductor structure includes providing an n-type field effect transistor comprising a source region, a drain region, and a first gate; forming a tensile stress layer on the n-type field effect transistor; removing the first gate so as to form a gate opening; performing an anneal so that the source region and the drain region memorize a stress induced by the tensile stress layer; forming a second gate; removing the tensile stress layer; and forming an interlayer dielectric layer on the n-type field effect transistor. A replacement process is combined with a stress memorization technique for enhancing the stress memorization effect and increasing mobility of electrons, which in turn improves overall properties of the semiconductor structure.
Public/Granted literature
- US20120252198A1 METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE Public/Granted day:2012-10-04
Information query
IPC分类: