Method for reducing dielectric overetch when making contact to conductive features

Invention Grant

US08497204B2 Method for reducing dielectric overetch when making contact to conductive features 有权

Title translation: 在与导电特征接触时减小介质过蚀刻的方法

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Patent Title: Method for reducing dielectric overetch when making contact to conductive features
Patent Title (中): 在与导电特征接触时减小介质过蚀刻的方法
Application No.: US13087646

Application Date: 2011-04-15
Publication No.: US08497204B2

Publication Date: 2013-07-30
Inventor: Christopher J. Petti
Applicant: Christopher J. Petti
Applicant Address: US CA Milpitas
Assignee: SanDisk 3D LLC
Current Assignee: SanDisk 3D LLC
Current Assignee Address: US CA Milpitas
Agency: Dugan & Dugan, PC
Main IPC: H01L21/311
IPC: H01L21/311

Method for reducing dielectric overetch when making contact to conductive features

Abstract:

In a first aspect, a method is provided that includes: forming a plurality of conductive or semiconductive features above a first dielectric material; depositing a second dielectric material above the conductive or semiconductive features; etching a void in the second dielectric material, wherein the etch is selective between the first and the second dielectric material and the etch stops on the first dielectric material; and exposing a portion of the conductive or semiconductive features. Numerous other aspects are provided.

Abstract(Chinese):

在第一方面，提供了一种方法，其包括：在第一介电材料上方形成多个导电或半导体特征; 在导电或半导体特征之上沉积第二电介质材料; 蚀刻所述第二电介质材料中的空隙，其中所述蚀刻在所述第一和第二电介质材料之间是选择性的，并且所述蚀刻停止在所述第一电介质材料上; 以及暴露导电或半导体特征的一部分。提供了许多其他方面。

Public/Granted literature

US20110189840A1 METHOD FOR REDUCING DIELECTRIC OVERETCH WHEN MAKING CONTACT TO CONDUCTIVE FEATURES Public/Granted day:2011-08-04

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/3105	......后处理
H01L21/311	.......绝缘层的刻蚀