Invention Grant
US08497583B2 Stress reduction in chip packaging by a stress compensation region formed around the chip
有权
通过在芯片周围形成的应力补偿区域来减小芯片封装的应力
- Patent Title: Stress reduction in chip packaging by a stress compensation region formed around the chip
- Patent Title (中): 通过在芯片周围形成的应力补偿区域来减小芯片封装的应力
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Application No.: US12964448Application Date: 2010-12-09
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Publication No.: US08497583B2Publication Date: 2013-07-30
- Inventor: Dmytro Chumakov , Michael Grillberger , Heike Berthold , Katrin Reiche
- Applicant: Dmytro Chumakov , Michael Grillberger , Heike Berthold , Katrin Reiche
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Williams, Morgan & Amerson, P.C.
- Priority: DE102010029522 20100531
- Main IPC: H01L29/40
- IPC: H01L29/40
Abstract:
A stress compensation region that may be appropriately positioned on a package substrate may compensate for or at least significantly reduce the thermally induced mechanical stress in a sensitive metallization system of a semiconductor die, in particular during the critical reflow process. For example, a stressor ring may be formed so as to laterally surround the chip receiving portion of the package substrate, wherein the stressor ring may efficiently compensate for the thermally induced deformation in the chip receiving portion.
Public/Granted literature
- US20110291299A1 Stress Reduction in Chip Packaging by a Stress Compensation Region Formed Around the Chip Public/Granted day:2011-12-01
Information query
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