Invention Grant
- Patent Title: Data transfer circuit and method with compensated clock jitter
- Patent Title (中): 具有补偿时钟抖动的数据传输电路和方法
-
Application No.: US13613342Application Date: 2012-09-13
-
Publication No.: US08497718B2Publication Date: 2013-07-30
- Inventor: Seung Jun Bae , Kwang Il Park , Young-Sik Kim , Sang Hyup Kwak
- Applicant: Seung Jun Bae , Kwang Il Park , Young-Sik Kim , Sang Hyup Kwak
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR2009-0030502 20090408
- Main IPC: H03L7/00
- IPC: H03L7/00

Abstract:
A data I/O interface for an integrated circuit device includes a noise detector receiving a power supply voltage, detecting a power supply voltage noise component, and providing a clock delay control signal in response to detected power supply voltage noise component. The data I/O interface also includes a clock delay circuit providing a delayed clock signal in response to the clock delay control signal, and a data transfer circuit powered by the power supply voltage and providing output data synchronously with the delayed clock signal.
Public/Granted literature
- US20130009685A1 DATA TRANSFER CIRCUIT AND METHOD WITH COMPENSATED CLOCK JITTER Public/Granted day:2013-01-10
Information query