Invention Grant
- Patent Title: Semiconductor storage device, method of controlling the same, and error correction system
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Application No.: US13743727Application Date: 2013-01-17
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Publication No.: US08499216B2Publication Date: 2013-07-30
- Inventor: Akira Yamaga
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-051419 20080229
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
A semiconductor storage device, a method of controlling the same, and an error correction system allow reduction in power consumption and circuit scale without detriment to error correction capability. An error correction code (ECC) circuit of a solid state drive (SSD) performs first error correction on read data using a first error correction code (Hamming code), and further performs second error correction on the result of the first error correction using a second error correction code (BHC code). Furthermore, the ECC circuit performs third error correction on the result of the second error correction using a third error correction code (RS code).
Public/Granted literature
- US20130132795A1 SEMICONDUCTOR STORAGE DEVICE, METHOD OF CONTROLLING THE SAME, AND ERROR CORRECTION SYSTEM Public/Granted day:2013-05-23
Information query
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