Timing exact design conversions from FPGA to ASIC

Invention Grant

US08499269B2 Timing exact design conversions from FPGA to ASIC 有权

Title translation: 从FPGA到ASIC的时序精确设计转换

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Patent Title: Timing exact design conversions from FPGA to ASIC
Patent Title (中): 从FPGA到ASIC的时序精确设计转换
Application No.: US12104377

Application Date: 2008-04-16
Publication No.: US08499269B2

Publication Date: 2013-07-30
Inventor: Raminda Udaya Madurawe
Applicant: Raminda Udaya Madurawe
Main IPC: G06F17/50
IPC: G06F17/50

Timing exact design conversions from FPGA to ASIC

Abstract:

A device having a design conversion from a field programmable gate array (FPGA) to an application specific integrated circuit (ASIC), comprising: a user configurable element in the FPGA replaced by a mask configurable element in the ASIC, wherein the FPGA and the ASIC have identical die size and identical transistor layouts.

Abstract(Chinese):

一种具有从现场可编程门阵列（FPGA）到专用集成电路（ASIC）的设计转换的器件，包括：由FPGA中的掩模可配置元件替换的FPGA中的用户可配置元件，其中FPGA和ASIC 具有相同的管芯尺寸和相同的晶体管布局。

Public/Granted literature

US20080218205A1 Timing Exact Design Conversions from FPGA to ASIC Public/Granted day:2008-09-11

Information query

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