Invention Grant
- Patent Title: Method of manufacturing multilayer printed wiring board
- Patent Title (中): 多层印刷线路板的制造方法
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Application No.: US13187060Application Date: 2011-07-20
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Publication No.: US08499446B2Publication Date: 2013-08-06
- Inventor: Toru Nakai , Sho Akai
- Applicant: Toru Nakai , Sho Akai
- Applicant Address: JP Ogaki-shi
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Main IPC: H05K3/02
- IPC: H05K3/02 ; C25D5/02

Abstract:
A method of manufacturing a multilayer printed wiring board includes forming a first interlaminar resin insulating layer, a first conductor circuit on the first interlaminar resin insulating layer, a second interlaminar resin insulating layer, opening portions in the second interlaminar resin insulating layer to expose a face of the first conductor circuit, an electroless plating film on the second interlaminar resin insulating layer and the exposed face, and a plating resist on the electroless plating film. The method further includes substituting the electroless plating film with a thin film conductor layer, having a lower ion tendency than the electroless plating film, and a metal of the exposed face, forming an electroplating film including the metal on a portion of the electroless plating film and the thin film conductor layer, stripping the plating resist, and removing the electroless plating film exposed by the stripping.
Public/Granted literature
- US20110272286A1 METHOD OF MANUFACTURING MULTILAYER PRINTED WIRING BOARD Public/Granted day:2011-11-10
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