Invention Grant
- Patent Title: Stacked integrated chips and methods of fabrication thereof
- Patent Title (中): 堆叠集成芯片及其制造方法
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Application No.: US12613408Application Date: 2009-11-05
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Publication No.: US08501587B2Publication Date: 2013-08-06
- Inventor: Ming-Fa Chen , Jao Sheng Huang
- Applicant: Ming-Fa Chen , Jao Sheng Huang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/467
- IPC: H01L21/467 ; H01L21/441

Abstract:
Structure and methods of forming stacked semiconductor chips are described. In one embodiment, a method of forming a semiconductor chip includes forming an opening for a through substrate via from a top surface of a first substrate. The sidewalls of the opening are lined with an insulating liner and the opened filled with a conductive fill material. The first substrate is etched from an opposite bottom surface to form a protrusion, the protrusion being covered with the insulating liner. A resist layer is deposited around the protrusion to expose a portion of the insulating liner. The exposed insulating liner is etched to form a sidewall spacer along the protrusion.
Public/Granted literature
- US20100178761A1 Stacked Integrated Chips and Methods of Fabrication Thereof Public/Granted day:2010-07-15
Information query
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