Invention Grant
- Patent Title: Semiconductor device with conductive vias between saw streets
- Patent Title (中): 半导体器件之间具有导电通孔之间的锯道
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Application No.: US13228248Application Date: 2011-09-08
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Publication No.: US08502352B2Publication Date: 2013-08-06
- Inventor: Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
- Applicant: Reza A. Pagaila , Linda Pei Ee Chua , Byung Tai Do
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC, Ltd.
- Current Assignee: STATS ChipPAC, Ltd.
- Current Assignee Address: SG Singapore
- Agency: Patent Law Group: Atkins & Associates, P.C.
- Agent Robert D. Atkins
- Main IPC: H01L23/544
- IPC: H01L23/544

Abstract:
A semiconductor device is made by disposing a plurality of semiconductor die on a carrier and creating a gap between each of the semiconductor die. A first insulating material is deposited in the gap. A portion of the first insulating material is removed. A conductive layer is formed over the semiconductor die. A conductive lining is conformally formed on the remaining portion of the first insulating material to form conductive via within the gap. The conductive vias can be tapered or vertical. The conductive via is electrically connected to a contact pad on the semiconductor die. A second insulating material is deposited in the gap over the conductive lining. A portion of the conductive via may extend outside the first and second insulating materials. The semiconductor die are singulated through the gap. The semiconductor die can be stacked and interconnected through the conductive vias.
Public/Granted literature
- US20120018900A1 Semiconductor Device and Method of Conforming Conductive Vias Between Insulating Layers in Saw Streets Public/Granted day:2012-01-26
Information query
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