Invention Grant
- Patent Title: Package substrate for bump on trace interconnection
- Patent Title (中): 封装衬底,用于跟踪互连上的凹凸
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Application No.: US13110935Application Date: 2011-05-19
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Publication No.: US08502377B2Publication Date: 2013-08-06
- Inventor: Tzu-Hung Lin , Ching-Liou Huang , Thomas Matthew Gregorich
- Applicant: Tzu-Hung Lin , Ching-Liou Huang , Thomas Matthew Gregorich
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: Mediatek Inc.
- Current Assignee: Mediatek Inc.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/44

Abstract:
A package substrate including a conductive pattern disposed on a die attach surface of the package substrate; at least one bumping trace inlaid into the conductive pattern; and at least one gap disposed along with the bumping trace in the conductive pattern to separate the bumping trace from a bulk portion of the conductive pattern. The bumping trace may have a lathy shape from a plan view and a width substantially between 10 μm and 40 μm and a length substantially between 70 μm and 130 μm, for example.
Public/Granted literature
- US20120032343A1 PACKAGE SUBSTRATE FOR BUMP ON TRACE INTERCONNECTION Public/Granted day:2012-02-09
Information query
IPC分类: