Invention Grant
- Patent Title: Non-volatile semiconductor memory device and a programming method thereof
- Patent Title (中): 非易失性半导体存储器件及其编程方法
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Application No.: US13041041Application Date: 2011-03-04
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Publication No.: US08503245B2Publication Date: 2013-08-06
- Inventor: Kunihiro Yamada , Naoyuki Shigyo , Michiru Hogyoku , Hideto Horii
- Applicant: Kunihiro Yamada , Naoyuki Shigyo , Michiru Hogyoku , Hideto Horii
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JPP2010-65233 20100319
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04

Abstract:
A non-volatile semiconductor memory device according to one aspect of an embodiment of the present invention includes: a semiconductor substrate; an element region; a plurality of memory cell transistors which each include a control gate electrode; and programming means for programming data to a programming target memory cell transistor by applying a programming voltage to the programming target memory cell transistor. Moreover, the programming means applies a programming voltage incremented stepwise from an initial programming voltage, to the programming target memory cell transistor while applying a constant initial intermediate voltage to memory cell transistors adjacent to the programming target memory cell transistor. Thereafter, the programming means applies an intermediate voltage incremented stepwise from the initial intermediate voltage, to one of the respective memory cells adjacent to the programming target memory cell transistor, while applying a constant final programming voltage to the programming target memory cell transistor.
Public/Granted literature
- US20110228610A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND A PROGRAMMING METHOD THEREOF Public/Granted day:2011-09-22
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