Invention Grant
US08503251B2 Semiconductor memory device having pipe latch circuit for storing output data during read operation and method for operating the same
有权
具有用于在读取操作期间存储输出数据的管锁存电路的半导体存储器件及其操作方法
- Patent Title: Semiconductor memory device having pipe latch circuit for storing output data during read operation and method for operating the same
- Patent Title (中): 具有用于在读取操作期间存储输出数据的管锁存电路的半导体存储器件及其操作方法
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Application No.: US12881813Application Date: 2010-09-14
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Publication No.: US08503251B2Publication Date: 2013-08-06
- Inventor: Hyung-Soo Kim , Ki-Myung Kyung , Ic-Su Oh , Chang-Kun Park
- Applicant: Hyung-Soo Kim , Ki-Myung Kyung , Ic-Su Oh , Chang-Kun Park
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2010-0065338 20100707
- Main IPC: G11C7/10
- IPC: G11C7/10
Abstract:
A semiconductor memory device includes a memory bank configured to output stored data in response to a column selection signal, a plurality of data latching units configured to latch the data outputted from the memory bank in response to an input control signal which is generated according to the column selection signal, and output the latched data in response to an output control signal, a time measurement unit configured to measure a time from an activation of the input control signal to an activation of the output control signal and generate a delay control signal, and an activation control unit configured to control an activation time of the column selection signal in response to the delay control signal.
Public/Granted literature
- US20120008422A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR OPERATING THE SAME Public/Granted day:2012-01-12
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