A sense amplifier circuit comprises a first inverter configured to provide a first trigger point during a pre-charge stage of a READ operation of a memory cell and provide a second trigger point either lower or higher than the first trigger point during a sense stage of the READ operation of the memory cell. The sense amplifier circuit further comprises a plurality of inverters coupled between an output of the first inverter and an output of the sense amplifier and a pre-charge device. The sense amplifier circuit having a dynamic trigger point can deliver faster data access time as well as less power consumption.