Invention Grant
- Patent Title: Modular multiplication processing apparatus
- Patent Title (中): 模块化乘法处理装置
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Application No.: US13041604Application Date: 2011-03-07
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Publication No.: US08504602B2Publication Date: 2013-08-06
- Inventor: Masayuki Yoshino , Katsuyuki Okeya , Camille Vuillaume
- Applicant: Masayuki Yoshino , Katsuyuki Okeya , Camille Vuillaume
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2006-031848 20060209
- Main IPC: G06F7/72
- IPC: G06F7/72

Abstract:
A modular multiplication processing apparatus is provided that can process modular multiplication of data exceeding a bit length which a coprocessor can readily process, by using the coprocessor based upon Montgomery multiplication In the modular multiplication processing apparatus, data to be subjected to modular multiplication is decomposed, and the decomposed data elements are transformed into a form suitable for Montgomery multiplication, respectively. Further, after respective data elements are transformed to have sizes that can be inputted into a coprocessor, Montgomery multiplication is repeatedly performed in the coprocessor. A remainder of Montgomery multiplication of an original bit length is restored from the obtained remainder.
Public/Granted literature
- US20110161390A1 MODULAR MULTIPLICATION PROCESSING APPARATUS Public/Granted day:2011-06-30
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