Invention Grant
- Patent Title: Systems and methods for instruction sequence compounding in a virtual machine environment
- Patent Title (中): 虚拟机环境中指令序列复合的系统和方法
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Application No.: US10882891Application Date: 2004-06-30
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Publication No.: US08504703B2Publication Date: 2013-08-06
- Inventor: Rene Antonio Vega , Eric P. Traut , Mike Neil
- Applicant: Rene Antonio Vega , Eric P. Traut , Mike Neil
- Applicant Address: US WA Redmond
- Assignee: Microsoft Corporation
- Current Assignee: Microsoft Corporation
- Current Assignee Address: US WA Redmond
- Agency: Woodcock Washburn LLP
- Main IPC: G06F15/16
- IPC: G06F15/16 ; G06F9/455

Abstract:
The present invention is a system for and method of providing instruction sequence compounding by (1) the virtual machine monitor's (VMM) looking ahead when an initial trap (exception) event occurs and recognizing traps within successive nearby instructions, combining and virtually executing the effects of multiple instructions while remaining inside the VMM's trap handler, and thereby minimizing the number of individual traps that would otherwise occur at each instruction and/or (2) the VMM's looking ahead when an initial context switch event occurs and recognizing context switches within successive nearby instructions, virtually combining the effects of multiple instructions and handing off this combined instruction to the host operating system, and thereby minimizing the number of individual context switches that would otherwise occur at each instruction. As a result, the number of processor cycles is reduced for exception handling and context switching in a virtual machine environment.
Public/Granted literature
- US20050080753A1 Systems and methods for instruction sequence compounding in a virtual machine environment Public/Granted day:2005-04-14
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