Invention Grant
- Patent Title: Semiconductor device manufacturing method thereof
- Patent Title (中): 半导体装置的制造方法
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Application No.: US12989226Application Date: 2009-05-13
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Publication No.: US08507327B2Publication Date: 2013-08-13
- Inventor: Yasuhiko Tsukamoto , Kazuo Shimoyama
- Applicant: Yasuhiko Tsukamoto , Kazuo Shimoyama
- Applicant Address: JP
- Assignee: Fuji Electric Co., Ltd.
- Current Assignee: Fuji Electric Co., Ltd.
- Current Assignee Address: JP
- Agency: Rossi, Kims & McDowell LLP
- Priority: JP2008-125402 20080513
- International Application: PCT/JP2009/058927 WO 20090513
- International Announcement: WO2009/139417 WO 20091119
- Main IPC: H01L21/332
- IPC: H01L21/332

Abstract:
Cutting work is performed on an n-semiconductor substrate (1) with an inverted trapezoid-shaped dicing blade to form grooves to be a second side walls (7). Bottom portions of the grooves are contacted with a p-diffusion layer (4) which is formed on a first principal plane (2) (front face) of the n-semiconductor substrate (1), so that the p-diffusion layer (4) is not cut. Then in the second side walls (7), a p-isolation layer (9) connected to a p-collector layer (8) and the p-diffusion layer (4) is formed. Since the p-diffusion layer (4) is not cut, a glass support substrate for supporting a wafer, and expensive adhesive, are not required, and therefore the p-isolation layer (4) can be formed at low cost.
Public/Granted literature
- US20110108883A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2011-05-12
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