Invention Grant
US08507354B2 On-chip capacitors in combination with CMOS devices on extremely thin semiconductor on insulator (ETSOI) substrates
有权
片上电容与CMOS器件结合在非常薄的半导体绝缘体(ETSOI)衬底上
- Patent Title: On-chip capacitors in combination with CMOS devices on extremely thin semiconductor on insulator (ETSOI) substrates
- Patent Title (中): 片上电容与CMOS器件结合在非常薄的半导体绝缘体(ETSOI)衬底上
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Application No.: US13314238Application Date: 2011-12-08
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Publication No.: US08507354B2Publication Date: 2013-08-13
- Inventor: Thomas N. Adam , Kangguo Cheng , Ali Khakifirooz , Alexander Reznieck
- Applicant: Thomas N. Adam , Kangguo Cheng , Ali Khakifirooz , Alexander Reznieck
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Katherine S. Brown, Esq.
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L29/94

Abstract:
A device including a semiconductor on insulator (SOI) substrate including a semiconductor device region and a capacitor device region. A semiconductor device present in the semiconductor device region. The semiconductor device including a gate structure present on a semiconductor on insulator (SOI) layer of the SOI substrate, extension source and drain regions present in the SOI layer on opposing sides of the gate structure, and raised source and drain regions composed of a first portion of an epitaxial semiconductor material on the SOI layer. A capacitor is present in the capacitor device region, said capacitor including a first electrode comprised of a second portion of the epitaxial semiconductor material that has a same composition and crystal structure as the first portion of the epitaxial semiconductor material, a node dielectric layer present on the second portion of the epitaxial semiconductor material, and a second electrode comprised of a conductive material.
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