Invention Grant
- Patent Title: Semiconductor device including transistors of different junction depth, and method of manufacturing the same
- Patent Title (中): 包括不同结深度的晶体管的半导体器件及其制造方法
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Application No.: US12929738Application Date: 2011-02-11
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Publication No.: US08507373B2Publication Date: 2013-08-13
- Inventor: Hiroki Shirai
- Applicant: Hiroki Shirai
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-187820 20080718
- Main IPC: H01L21/425
- IPC: H01L21/425 ; H01L21/8238

Abstract:
A semiconductor device having a DRAM region and a logic region embedded together therein, including a first transistor formed in a DRAM region, and having a first source/drain region containing at least a first impurity, and a second transistor formed in a logic region, and having a second source/drain region containing at least a second impurity, wherein each of the first source/drain region and the second source/drain region has a silicide layer respectively formed in the surficial portion thereof, and the first source/drain region has a junction depth which is determined by an impurity and is deeper than the junction depth of the second source/drain region.
Public/Granted literature
- US20110156164A1 Semiconductor device and method of manufacturing the same Public/Granted day:2011-06-30
Information query
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