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US08508984B2 Low resistance high-TMR magnetic tunnel junction and process for fabrication thereof 有权
低电阻高TMR磁隧道结及其制造方法

Low resistance high-TMR magnetic tunnel junction and process for fabrication thereof
Abstract:
A non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, and a free layer formed on top of the barrier layer, wherein the electrical resistivity of the barrier layer is reduced by placing said barrier layer under compressive stress. Compressive stress is induced by either using a compressive stress inducing layer, or by using inert gases at low pressure during the sputtering process as the barrier layer is deposited, or by introducing compressive stress inducing molecules into the molecular lattice of the barrier layer.
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