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US08509003B2 Read architecture for MRAM 有权
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Read architecture for MRAM
Abstract:
A read architecture for reading random access memory (RAM) cells includes a multi-level sense amplifier, the multi-level sense amplifier including a plurality of sense amplifiers, each sense amplifier having a respective sense threshold and a respective sense output, and a storage module coupled to the multi-level sense amplifier for storing the sense outputs of the multi-level sense amplifier. The storage module stores a first set of sense outputs corresponding to a first read of an RAM cell and stores a second set of sense outputs corresponding to a second read of the RAM cell. The architecture also includes a decision module for comparing the first and second set of sense outputs and determining a data state of the RAM cell based on the comparison.
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