Invention Grant
- Patent Title: Read architecture for MRAM
- Patent Title (中): 阅读MRAM架构
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Application No.: US13237282Application Date: 2011-09-20
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Publication No.: US08509003B2Publication Date: 2013-08-13
- Inventor: Kai-Chun Lin , Hung-Chang Yu , Yue-Der Chih
- Applicant: Kai-Chun Lin , Hung-Chang Yu , Yue-Der Chih
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Duane Morris LLP
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C11/56

Abstract:
A read architecture for reading random access memory (RAM) cells includes a multi-level sense amplifier, the multi-level sense amplifier including a plurality of sense amplifiers, each sense amplifier having a respective sense threshold and a respective sense output, and a storage module coupled to the multi-level sense amplifier for storing the sense outputs of the multi-level sense amplifier. The storage module stores a first set of sense outputs corresponding to a first read of an RAM cell and stores a second set of sense outputs corresponding to a second read of the RAM cell. The architecture also includes a decision module for comparing the first and second set of sense outputs and determining a data state of the RAM cell based on the comparison.
Public/Granted literature
- US20130070519A1 READ ARCHITECTURE FOR MRAM Public/Granted day:2013-03-21
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