Invention Grant
US08510496B1 Scheduling access requests for a multi-bank low-latency random read memory device
有权
调度多行低延迟随机读取存储器设备的访问请求
- Patent Title: Scheduling access requests for a multi-bank low-latency random read memory device
- Patent Title (中): 调度多行低延迟随机读取存储器设备的访问请求
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Application No.: US12430776Application Date: 2009-04-27
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Publication No.: US08510496B1Publication Date: 2013-08-13
- Inventor: George Totolos, Jr. , Nhiem T. Nguyen
- Applicant: George Totolos, Jr. , Nhiem T. Nguyen
- Applicant Address: US CA Sunnyvale
- Assignee: NetApp, Inc.
- Current Assignee: NetApp, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: Stattler-Suh PC
- Main IPC: G06F12/06
- IPC: G06F12/06 ; G06F13/00 ; G06F13/28

Abstract:
Method and apparatus for scheduling access requests for a multi-bank low-latency random read memory (LLRRM) device within a storage system. The LLRRM device comprising a plurality of memory banks, each bank being simultaneously and independently accessible. A queuing layer residing in storage system may allocate a plurality of request-queuing data structures (“queues”), each queue being assigned to a memory bank. The queuing layer may receive access requests for memory banks in the LLRRM device and store each received access request in the queue assigned to the requested memory bank. The queuing layer may then send, to the LLRRM device for processing, an access request from each request-queuing data structure in successive order. As such, requests sent to the LLRRM device will comprise requests that will be applied to each memory bank in successive order as well, thereby reducing access latencies of the LLRRM device.
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