A software program for verifying a system design having at least one integrated circuit chip. The software program, when executed by a processor, result in obtaining a random value for a variable; selecting an unused value for the variable based upon the random value, the variable not having been assigned the unused value during one or more prior verification tests; and creating a new verification test for the system using the unused value for the variable. In this way, the new verification test is created in which variables falling within a random class are more efficiently used.