Invention Grant
- Patent Title: Computing device and method for checking via stub
- Patent Title (中): 用于通过存根检查的计算设备和方法
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Application No.: US13327771Application Date: 2011-12-16
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Publication No.: US08510705B2Publication Date: 2013-08-13
- Inventor: Jia-Lu Ye , Chia-Nan Pai , Shou-Kuo Hsu
- Applicant: Jia-Lu Ye , Chia-Nan Pai , Shou-Kuo Hsu
- Applicant Address: CN Shenzhen TW New Taipei
- Assignee: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.,Hon Hai Precision Industry Co., Ltd.
- Current Assignee: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd.,Hon Hai Precision Industry Co., Ltd.
- Current Assignee Address: CN Shenzhen TW New Taipei
- Agency: Altis Law Group, Inc.
- Priority: CN201110312725 20111014
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A computer-based method and a computing device for checking stub lengths of via stubs of a printed circuit board (PCB) layout are provided. The computing device displays a check interface, selects signal transmission line from a currently run PCB layout through the check interface, receives a reference stub length input through the check interface, and determines the actual stub length of each via stub of each via each selected signal transmission line connected to. The computing device further determines that a design of one via stub satisfies the design standards, if the actual stub length of the one stub via is less than or equal to the reference length, and determines that a design of one via stub does not satisfy the design standards if the actual stub length of the one via stub is greater than the reference stub length.
Public/Granted literature
- US20130097576A1 COMPUTING DEVICE AND METHOD FOR CHECKING VIA STUB Public/Granted day:2013-04-18
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