Invention Grant
- Patent Title: One-transistor pixel array with cascoded column circuit
- Patent Title (中): 具有串联列电路的单晶体管像素阵列
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Application No.: US13421695Application Date: 2012-03-15
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Publication No.: US08524487B2Publication Date: 2013-09-03
- Inventor: Keith Fife
- Applicant: Keith Fife
- Applicant Address: US CA Carlsbad
- Assignee: Life Technologies Corporation
- Current Assignee: Life Technologies Corporation
- Current Assignee Address: US CA Carlsbad
- Main IPC: C12M1/00
- IPC: C12M1/00 ; C12M1/34 ; C12M3/00 ; C12Q1/68 ; G01N27/403

Abstract:
To reduce the pixel size to the smallest dimensions and simplest form of operation, a pixel may be formed by using only one ion sensitive field-effect transistor (ISFET). This one-transistor, or 1T, pixel can provide gain by converting the drain current to voltage in the column. Configurable pixels can be created to allow both common source read out as well as source follower read out. A plurality of the 1T pixels may form an array, having a number of rows and a number of columns and a column readout circuit in each column. A cascoded device enabled during readout may be used to provide increased programmable gain.
Public/Granted literature
- US20120168307A1 One-Transistor Pixel Array with Cascoded Column Circuit Public/Granted day:2012-07-05
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