Invention Grant
US08524535B2 Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board 有权
半导体元件,半导体元件的制造方法,多层印刷电路板以及多层印刷电路板的制造方法

  • Patent Title: Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
  • Patent Title (中): 半导体元件,半导体元件的制造方法,多层印刷电路板以及多层印刷电路板的制造方法
  • Application No.: US12107377
    Application Date: 2008-04-22
  • Publication No.: US08524535B2
    Publication Date: 2013-09-03
  • Inventor: Hajime SakamotoDongdong Wang
  • Applicant: Hajime SakamotoDongdong Wang
  • Applicant Address: JP Ogaki-shi
  • Assignee: IBIDEN Co., Ltd.
  • Current Assignee: IBIDEN Co., Ltd.
  • Current Assignee Address: JP Ogaki-shi
  • Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
  • Priority: JP2000-290231 20000925; JP2000-290232 20000925; JP2000-382806 20001215; JP2000-382807 20001215; JP2000-382813 20001215; JP2000-382814 20001215
  • Main IPC: H01L21/82
  • IPC: H01L21/82
Semiconductor element, method of manufacturing semiconductor element, multi-layer printed circuit board, and method of manufacturing multi-layer printed circuit board
Abstract:
A transition layer 38 is provided on a die pad 22 of an IC chip 20 and integrated into a multilayer printed circuit board 10. Due to this, it is possible to electrically connect the IC chip 20 to the multilayer printed circuit board 10 without using lead members and a sealing resin. Also, by providing the transition layer 38 made of copper on an aluminum pad 24, it is possible to prevent a resin residue on the pad 24 and to improve connection characteristics between the die pad 24 and a via hole 60 and reliability.
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